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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-28 19:15:34 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 18:28:27 +0200
commit585d1a0e7d0025e459a35b470572bcdbfff4e3c8 (patch)
tree05b159c11a72cbd4bcbf18e67a639177388d78a0 /src/cpu/amd/pi
parent9071670a84281979709191307dc11f1350f81bd8 (diff)
downloadcoreboot-585d1a0e7d0025e459a35b470572bcdbfff4e3c8.tar.xz
src/cpu: Capitalize ROM and RAM
Change-Id: I103167a0c39627bcd2ca1d0d4288eb5df02a6cd2 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15935 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/amd/pi')
-rw-r--r--src/cpu/amd/pi/cache_as_ram.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/pi/cache_as_ram.inc b/src/cpu/amd/pi/cache_as_ram.inc
index fd5e66dc9c..40ec1b2fc2 100644
--- a/src/cpu/amd/pi/cache_as_ram.inc
+++ b/src/cpu/amd/pi/cache_as_ram.inc
@@ -81,7 +81,7 @@ cache_as_ram_setup:
movl $0xc00000e3, 0x18(%edi)
movl %eax, 0x1c(%edi)
- # load rom based identity mapped page tables
+ # load ROM based identity mapped page tables
mov %ecx, %eax
mov %eax, %cr3