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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-22 11:42:32 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-22 11:42:32 +0000 |
| commit | c02b4fc9db3c3c1e263027382697b566127f66bb (patch) | |
| tree | 11bd18488e360e5c1beeb9ccb852ef4489c3689a /src/cpu/amd/quadcore | |
| parent | 27852aba6787617ca5656995cbc7e8ef0a3ea22c (diff) | |
| download | coreboot-c02b4fc9db3c3c1e263027382697b566127f66bb.tar.xz | |
printk_foo -> printk(BIOS_FOO, ...)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/quadcore')
| -rw-r--r-- | src/cpu/amd/quadcore/amd_sibling.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/quadcore/quadcore.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/amd/quadcore/amd_sibling.c b/src/cpu/amd/quadcore/amd_sibling.c index 999c51807c..4f5c68efd5 100644 --- a/src/cpu/amd/quadcore/amd_sibling.c +++ b/src/cpu/amd/quadcore/amd_sibling.c @@ -114,7 +114,7 @@ u32 get_apicid_base(u32 ioapic_num) if((apicid_base+ioapic_num-1)>0xf) { // We need to enable APIC EXT ID - printk_spew("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in MB Option.lb so you can spare 16 id for ioapic\r\n"); + printk(BIOS_SPEW, "if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in MB Option.lb so you can spare 16 id for ioapic\r\n"); enable_apic_ext_id(sysconf.nodes); } diff --git a/src/cpu/amd/quadcore/quadcore.c b/src/cpu/amd/quadcore/quadcore.c index 7d621c5375..56b59eec5f 100644 --- a/src/cpu/amd/quadcore/quadcore.c +++ b/src/cpu/amd/quadcore/quadcore.c @@ -59,7 +59,7 @@ static void real_start_other_core(u32 nodeid, u32 cores) { u32 dword, i; - printk_debug("Start other core - nodeid: %02x cores: %02x\n", nodeid, cores); + printk(BIOS_DEBUG, "Start other core - nodeid: %02x cores: %02x\n", nodeid, cores); /* set PCI_DEV(0, 0x18+nodeid, 3), 0x44 bit 27 to redirect all MC4 accesses and error logging to core0 */ @@ -88,7 +88,7 @@ static void start_other_cores(void) // disable quad_core if (read_option(CMOS_VSTART_quad_core, CMOS_VLEN_quad_core, 0) != 0) { - printk_debug("Skip additional core init\n"); + printk(BIOS_DEBUG, "Skip additional core init\n"); return; } @@ -96,7 +96,7 @@ static void start_other_cores(void) for (nodeid = 0; nodeid < nodes; nodeid++) { u32 cores = get_core_num_in_bsp(nodeid); - printk_debug("init node: %02x cores: %02x \n", nodeid, cores); + printk(BIOS_DEBUG, "init node: %02x cores: %02x \n", nodeid, cores); if (cores > 0) { real_start_other_core(nodeid, cores); } |