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authorStefan Reinauer <stepan@openbios.org>2006-03-17 22:48:23 +0000
committerStefan Reinauer <stepan@openbios.org>2006-03-17 22:48:23 +0000
commitdba3f846f0978812d081245d9e636cd434978067 (patch)
tree94f6ac9e3cef71e71aedb39e4b91c1227f83e79f /src/cpu/amd/sc520/raminit.c
parentf4001cd8a7d1e578e22a391150c4c446e13157c0 (diff)
downloadcoreboot-dba3f846f0978812d081245d9e636cd434978067.tar.xz
- sc520 updates. move PAR setup to mainboard auto.c
- some ts5300 code. Let's push this upstream for now. - fix a typo in device.c git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/sc520/raminit.c')
-rw-r--r--src/cpu/amd/sc520/raminit.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/cpu/amd/sc520/raminit.c b/src/cpu/amd/sc520/raminit.c
index 21a786de00..9a914956dc 100644
--- a/src/cpu/amd/sc520/raminit.c
+++ b/src/cpu/amd/sc520/raminit.c
@@ -83,11 +83,15 @@ setupsc520(void){
sp = (unsigned short *)0xfffef040;
*sp = 0;
+ // moved to auto.c by stepan
+ setup_pars();
+#if 0
/* as per the book: */
/* PAR register setup */
/* set up the PAR registers as they are on the MSM586SEG */
par = (unsigned long *) 0xfffef088;
+
/* NOTE: move this to mainboard.c ASAP */
#if 1
@@ -111,7 +115,7 @@ setupsc520(void){
par += 15;
#endif
*par++ = 0x8a020200; /*PAR15: BOOTCS:code:nocache:write:Base 0x2000000, size 0x80000:*/
-
+#endif
/* CPCSF register */