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author | Myles Watson <mylesgw@gmail.com> | 2010-09-10 18:33:24 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2010-09-10 18:33:24 +0000 |
commit | 6ea2115ceae9d426f293b029f305e61a01346640 (patch) | |
tree | 13ac5430e7442060dc6e97956a015fe04ab1d1d0 /src/cpu/amd/socket_ASB2 | |
parent | 17daf9a941e1c5653a84ba651b21815404f2b4b5 (diff) | |
download | coreboot-6ea2115ceae9d426f293b029f305e61a01346640.tar.xz |
Move memory type information out of some AMD sockets.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/socket_ASB2')
-rw-r--r-- | src/cpu/amd/socket_ASB2/Kconfig | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/cpu/amd/socket_ASB2/Kconfig b/src/cpu/amd/socket_ASB2/Kconfig index 3aa95c300f..7b8857f3a4 100644 --- a/src/cpu/amd/socket_ASB2/Kconfig +++ b/src/cpu/amd/socket_ASB2/Kconfig @@ -9,12 +9,6 @@ config CPU_SOCKET_TYPE default 0x13 depends on CPU_AMD_SOCKET_ASB2 -# DDR3 and REG -config DIMM_SUPPORT - hex - default 0x0005 - depends on CPU_AMD_SOCKET_ASB2 - config EXT_RT_TBL_SUPPORT bool default n |