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author | Zheng Bao <zheng.bao@amd.com> | 2011-03-28 04:29:14 +0000 |
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committer | Zheng Bao <Zheng.Bao@amd.com> | 2011-03-28 04:29:14 +0000 |
commit | 2ca2f177245fdfa34ae7bd732052c8984e2b8b7d (patch) | |
tree | b6852663c5c29001ed76241c73b5c7d135510a1d /src/cpu/amd/socket_C32/Makefile.inc | |
parent | c3422235b14d97c16bd13113c522827d1cfda9b4 (diff) | |
download | coreboot-2ca2f177245fdfa34ae7bd732052c8984e2b8b7d.tar.xz |
Add AMD C32 support.
It is based on other existing Fam10 code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6464 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/socket_C32/Makefile.inc')
-rw-r--r-- | src/cpu/amd/socket_C32/Makefile.inc | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/cpu/amd/socket_C32/Makefile.inc b/src/cpu/amd/socket_C32/Makefile.inc new file mode 100644 index 0000000000..8ce43fb485 --- /dev/null +++ b/src/cpu/amd/socket_C32/Makefile.inc @@ -0,0 +1,14 @@ +ramstage-y += socket_C32.c +subdirs-y += ../model_10xxx +subdirs-y += ../quadcore +subdirs-y += ../mtrr +subdirs-y += ../microcode +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/pae +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/smm +subdirs-y += ../smm + +cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc |