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authorPatrick Georgi <patrick@georgi-clan.de>2011-10-31 17:07:52 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2011-11-01 19:06:23 +0100
commit784544b934d67dc85ccfcf33e04ff148045836ad (patch)
tree8f120ca06da0b126f09526d8814708b95ea6259f /src/cpu/amd/socket_C32
parent36c04e8a5c54b100a505650218419e112ccc266e (diff)
downloadcoreboot-784544b934d67dc85ccfcf33e04ff148045836ad.tar.xz
Remove XIP_ROM_BASE
The base is now calculated automatically, and all mentions of that config option were typical anyway (4GB - XIP_ROM_SIZE). Change-Id: Icdf908dc043719f3810f7b5b85ad9938f362ea40 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/366 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/socket_C32')
-rw-r--r--src/cpu/amd/socket_C32/Kconfig5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/cpu/amd/socket_C32/Kconfig b/src/cpu/amd/socket_C32/Kconfig
index 7ffa374962..56324dc776 100644
--- a/src/cpu/amd/socket_C32/Kconfig
+++ b/src/cpu/amd/socket_C32/Kconfig
@@ -30,11 +30,6 @@ config CDB
default 0x18
depends on CPU_AMD_SOCKET_C32
-config XIP_ROM_BASE
- hex
- default 0xfff80000
- depends on CPU_AMD_SOCKET_C32
-
config XIP_ROM_SIZE
hex
default 0x80000