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| author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2015-07-17 07:47:41 -0500 |
|---|---|---|
| committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2015-07-22 20:52:27 +0200 |
| commit | df5446196cd81c4a714f45f92fb379c795c1edb5 (patch) | |
| tree | a11808f250a7d7415f760a5b487e9b9ed4642d36 /src/cpu/amd/socket_S1G1 | |
| parent | 3332f33009c41f36b6db9d691eb3ea506ea2e4e4 (diff) | |
| download | coreboot-df5446196cd81c4a714f45f92fb379c795c1edb5.tar.xz | |
amd/model_fxx: set CPU_ADDR_BITS to 40 on all K8 machines
Moves the K8 CPU_ADDR_BITS definition from socket to model.
Previously socket_F was not setting CPU_ADDR_BITS correctly.
Tested on Sun Ultra 40 M2 with two 2nd-gen Opterons w/ 2x4x2GiB DIMMs.
Most if not all K8-based chips support 40-bit physical addresses, with
possible exception of IA32-only K8-based Athlon XP-M chips.
Probably irrelevant, unless your machine has enough memory (at least 60 to
64GiB before MMIO hoisting) to exceed the CPU_ADDR_BITS default of 36 from
src/cpu/x86/Kconfig.
Change-Id: I01a2a59fa902280171840c36ca2e631476d3d603
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/10963
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/cpu/amd/socket_S1G1')
| -rw-r--r-- | src/cpu/amd/socket_S1G1/Kconfig | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/amd/socket_S1G1/Kconfig b/src/cpu/amd/socket_S1G1/Kconfig index 01d84a1d3a..3338677e5a 100644 --- a/src/cpu/amd/socket_S1G1/Kconfig +++ b/src/cpu/amd/socket_S1G1/Kconfig @@ -19,10 +19,6 @@ config DIMM_SUPPORT hex default 0x0204 -config CPU_ADDR_BITS - int - default 40 - config DCACHE_RAM_BASE hex default 0xc8000 |