summaryrefslogtreecommitdiff
path: root/src/cpu/amd
diff options
context:
space:
mode:
authorPaul Menzel <pmenzel@molgen.mpg.de>2017-10-14 13:24:06 +0200
committerMartin Roth <martinroth@google.com>2017-10-16 02:05:16 +0000
commit1d6002a27ce74611f16601ccf59e41e8845cde9f (patch)
tree3026cec1be4c4707346daf30cf5e0d26fadb2a5b /src/cpu/amd
parentceb52711d7120b4c53af2d2f2e3350727f93804c (diff)
downloadcoreboot-1d6002a27ce74611f16601ccf59e41e8845cde9f.tar.xz
cpu/amd: Fix spelling of *implementation*
Change-Id: I3ef810ee59492c8d7147934e61523c8fd223863b Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/22013 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/agesa/family15tn/udelay.c2
-rw-r--r--src/cpu/amd/pi/00630F01/udelay.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/agesa/family15tn/udelay.c b/src/cpu/amd/agesa/family15tn/udelay.c
index cc673e2d6e..3d40fc3b33 100644
--- a/src/cpu/amd/agesa/family15tn/udelay.c
+++ b/src/cpu/amd/agesa/family15tn/udelay.c
@@ -15,7 +15,7 @@
*/
/*
- * udelay() impementation for SMI handlers
+ * udelay() implementation for SMI handlers
* This is neat in that it never writes to hardware registers, and thus does
* not modify the state of the hardware while servicing SMIs.
*/
diff --git a/src/cpu/amd/pi/00630F01/udelay.c b/src/cpu/amd/pi/00630F01/udelay.c
index 332f730843..5b08bedb1e 100644
--- a/src/cpu/amd/pi/00630F01/udelay.c
+++ b/src/cpu/amd/pi/00630F01/udelay.c
@@ -15,7 +15,7 @@
*/
/*
- * udelay() impementation for SMI handlers
+ * udelay() implementation for SMI handlers
* This is neat in that it never writes to hardware registers, and thus does not
* modify the state of the hardware while servicing SMIs.
*/