summaryrefslogtreecommitdiff
path: root/src/cpu/amd
diff options
context:
space:
mode:
authorMarshall Dawson <marshalldawson3rd@gmail.com>2018-08-07 11:50:54 -0600
committerMartin Roth <martinroth@google.com>2018-08-08 17:50:45 +0000
commite13dd172b12a51472641939c42005d40d7328836 (patch)
tree6973632d94162f3f2c171b4a5a88b1de74ff0c17 /src/cpu/amd
parentbddd157ea1508e5d13dd592533bc7607241388fa (diff)
downloadcoreboot-e13dd172b12a51472641939c42005d40d7328836.tar.xz
cpu/amd: Improve formatting
Remove for() braces from around single lines. Remove extra blank lines. This cleans up checkpatch problems in a subsequent patch. Change-Id: I329ac03365e51799581c56eed27ee54de6826f14 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/27935 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/agesa/family12/model_12_init.c3
-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c3
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c3
-rw-r--r--src/cpu/amd/agesa/family16kb/model_16_init.c4
-rw-r--r--src/cpu/amd/family_10h-family_15h/model_10xxx_init.c3
-rw-r--r--src/cpu/amd/pi/00660F01/model_15_init.c1
-rw-r--r--src/cpu/amd/pi/00730F01/model_16_init.c2
7 files changed, 5 insertions, 14 deletions
diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c
index afdfb3b006..93aecadb18 100644
--- a/src/cpu/amd/agesa/family12/model_12_init.c
+++ b/src/cpu/amd/agesa/family12/model_12_init.c
@@ -54,9 +54,8 @@ static void model_12_init(struct device *dev)
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < 5; i++)
wrmsr(MC0_STATUS + (i * 4), msr);
- }
enable_cache();
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 257f81fd7a..ffb856a9b0 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -77,9 +77,8 @@ static void model_14_init(struct device *dev)
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
- for (i = 0; i < 6; i++) {
+ for (i = 0; i < 6; i++)
wrmsr(MC0_STATUS + (i * 4), msr);
- }
/* Enable the local CPU APICs */
setup_lapic();
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 1e0375f23c..8ae184e78d 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -74,9 +74,8 @@ static void model_15_init(struct device *dev)
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
- for (i = 0; i < 6; i++) {
+ for (i = 0; i < 6; i++)
wrmsr(MC0_STATUS + (i * 4), msr);
- }
/* Enable the local CPU APICs */
setup_lapic();
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index 9909793874..92c7bcaee2 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -72,9 +72,8 @@ static void model_16_init(struct device *dev)
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
- for (i = 0; i < 6; i++) {
+ for (i = 0; i < 6; i++)
wrmsr(MC0_STATUS + (i * 4), msr);
- }
/* Enable the local CPU APICs */
setup_lapic();
@@ -99,7 +98,6 @@ static void model_16_init(struct device *dev)
msr.hi &= ~(1 << (46 - 32));
wrmsr(NB_CFG_MSR, msr);
-
/* Write protect SMM space with SMMLOCK. */
msr = rdmsr(HWCR_MSR);
msr.lo |= (1 << 0);
diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
index 61eb81393a..74d4673bc0 100644
--- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
+++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
@@ -111,9 +111,8 @@ static void model_10xxx_init(struct device *dev)
/* zero the machine check error status registers */
msr.lo = 0;
msr.hi = 0;
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < 5; i++)
wrmsr(MC0_STATUS + (i * 4), msr);
- }
enable_cache();
diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c
index 24c2aea3d1..0540a72fad 100644
--- a/src/cpu/amd/pi/00660F01/model_15_init.c
+++ b/src/cpu/amd/pi/00660F01/model_15_init.c
@@ -86,7 +86,6 @@ static void model_15_init(struct device *dev)
for (i = 0; i < 6; i++)
wrmsr(MC0_STATUS + (i * 4), msr);
-
/* Enable the local CPU APICs */
setup_lapic();
diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c
index b9e01852b8..3ae841d0b1 100644
--- a/src/cpu/amd/pi/00730F01/model_16_init.c
+++ b/src/cpu/amd/pi/00730F01/model_16_init.c
@@ -71,7 +71,6 @@ static void model_16_init(struct device *dev)
for (i = 0; i < 6; i++)
wrmsr(MC0_STATUS + (i * 4), msr);
-
/* Enable the local CPU APICs */
setup_lapic();
@@ -95,7 +94,6 @@ static void model_16_init(struct device *dev)
msr.hi &= ~(1 << (46 - 32));
wrmsr(NB_CFG_MSR, msr);
-
/* Write protect SMM space with SMMLOCK. */
msr = rdmsr(HWCR_MSR);
msr.lo |= (1 << 0);