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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-05-25 08:52:07 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-28 08:55:31 +0000
commite76ce871c8f84aef38fbf9df9c8bee3c10c085d7 (patch)
tree02359779387bb2b7b329150c9642280b5c0fb999 /src/cpu/amd
parent49dbbe99c2e645f5d800fa9f88a97ff6d545efba (diff)
downloadcoreboot-e76ce871c8f84aef38fbf9df9c8bee3c10c085d7.tar.xz
arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits
With top-aligned bootblock this is no longer globally needed. The default maximum is now a generous 256 KiB with couple platforms having lower limits of 32 KiB and 64 KiB. Change-Id: Ib1aee44908c0dcbc17978d3ee53bd05a6200410c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47600 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/agesa/Kconfig4
-rw-r--r--src/cpu/amd/pi/Kconfig4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index b144fc1ca1..51b61a19be 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -37,10 +37,6 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
-config C_ENV_BOOTBLOCK_SIZE
- hex
- default 0x8000
-
config ENABLE_MRC_CACHE
bool "Use cached memory configuration"
default n
diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig
index d3a94a8c21..7b214f7aa0 100644
--- a/src/cpu/amd/pi/Kconfig
+++ b/src/cpu/amd/pi/Kconfig
@@ -36,10 +36,6 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
-config C_ENV_BOOTBLOCK_SIZE
- hex
- default 0x8000
-
endif # CPU_AMD_PI
source "src/cpu/amd/pi/00630F01/Kconfig"