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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-28 07:38:46 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-09 20:52:07 +0100
commit9d6f365643d78c223b7ebf9e214381ec707b482a (patch)
tree96a77b4bb24e865f854bec44cb3e4f2d2061e43d /src/cpu/amd
parent2c7ad8c8d3f7e508ee64f1af4fe81a60b8c84da1 (diff)
downloadcoreboot-9d6f365643d78c223b7ebf9e214381ec707b482a.tar.xz
ACPI S3: Remove HIGH_MEMORY_SAVE where possible
Add implementation to use actual requirements of ramstage size for S3 resume backup in CBMEM. The backup covers complete pages of 4 KiB. Only the required amount of low memory is backed up when ACPI_TINY_LOWMEM_BACKUP is selected for the platform. Enable this option for AGESA and binaryPI, other platforms (without RELOCATABLE_RAMSTAGE) currently keep their romstage ramstack in low memory for s3 resume path. Change-Id: Ide7ce013f3727c2928cdb00fbcc7e7e84e859ff1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15255 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/agesa/Kconfig1
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c4
-rw-r--r--src/cpu/amd/pi/Kconfig1
3 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index ae5e8549df..7fe24cebb9 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -31,6 +31,7 @@ config CPU_AMD_AGESA
select UDELAY_LAPIC
select LAPIC_MONOTONIC_TIMER
select SPI_FLASH if HAVE_ACPI_RESUME
+ select ACPI_TINY_LOWMEM_BACKUP
if CPU_AMD_AGESA
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 19aa0a2fe6..296adc9869 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -69,7 +69,7 @@ static void prepare_romstage_ramstack(int s3resume)
print_car_debug("Prepare CAR migration and stack regions...");
if (s3resume) {
- void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
+ void *resume_backup_memory = acpi_backup_container(CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
if (resume_backup_memory)
memcpy_(resume_backup_memory + HIGH_MEMORY_SAVE - backup_top,
(void *)(CONFIG_RAMTOP - backup_top), backup_top);
@@ -85,7 +85,7 @@ static void prepare_ramstage_region(int s3resume)
print_car_debug("Prepare ramstage memory region...");
if (s3resume) {
- void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
+ void *resume_backup_memory = acpi_backup_container(CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
if (resume_backup_memory)
memcpy_(resume_backup_memory, (void *) CONFIG_RAMBASE,
HIGH_MEMORY_SAVE - backup_top);
diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig
index ed379ea351..203fa03b6d 100644
--- a/src/cpu/amd/pi/Kconfig
+++ b/src/cpu/amd/pi/Kconfig
@@ -28,6 +28,7 @@ config CPU_AMD_PI
select UDELAY_LAPIC
select LAPIC_MONOTONIC_TIMER
select SPI_FLASH if HAVE_ACPI_RESUME
+ select ACPI_TINY_LOWMEM_BACKUP
if CPU_AMD_PI