diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-19 08:29:41 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-26 02:08:42 +0000 |
| commit | c99d3afe3e78565937c215f882bd4b7fc586f66e (patch) | |
| tree | 4883a3ae5d65c369c5c85abae73cc1946f0a2c76 /src/cpu/amd | |
| parent | 1e02d73c73f6f59f66c198b8c2afe77b0a730b01 (diff) | |
| download | coreboot-c99d3afe3e78565937c215f882bd4b7fc586f66e.tar.xz | |
amdfam10: Remove use of __PRE_RAM__
Change-Id: I4215b27332034a3c07052db92e4abae55c3fe967
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/ram_calc.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/quadcore/quadcore_id.c | 8 |
2 files changed, 4 insertions, 6 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/ram_calc.c b/src/cpu/amd/family_10h-family_15h/ram_calc.c index 1433e0753f..582fba97fa 100644 --- a/src/cpu/amd/family_10h-family_15h/ram_calc.c +++ b/src/cpu/amd/family_10h-family_15h/ram_calc.c @@ -68,7 +68,7 @@ uint64_t get_cc6_memory_size() if (is_fam15h()) { enable_cc6 = 0; -#ifdef __PRE_RAM__ +#ifdef __SIMPLE_DEVICE__ if (pci_read_config32(PCI_DEV(0, 0x18, 2), 0x118) & (0x1 << 18)) enable_cc6 = 1; #else diff --git a/src/cpu/amd/quadcore/quadcore_id.c b/src/cpu/amd/quadcore/quadcore_id.c index 5afb051ace..f3e9f4b346 100644 --- a/src/cpu/amd/quadcore/quadcore_id.c +++ b/src/cpu/amd/quadcore/quadcore_id.c @@ -17,11 +17,9 @@ #include <arch/cpu.h> +#include <cpu/amd/msr.h> #include <cpu/amd/multicore.h> #include <device/pci_ops.h> -#ifdef __PRE_RAM__ -#include <cpu/amd/msr.h> -#endif //called by bus_cpu_scan too u32 read_nb_cfg_54(void) @@ -48,7 +46,7 @@ struct node_core_id get_node_core_id(u32 nb_cfg_54) uint32_t family; uint32_t model; -#ifdef __PRE_RAM__ +#ifdef __SIMPLE_DEVICE__ f3xe8 = pci_read_config32(NODE_PCI(0, 3), 0xe8); #else f3xe8 = pci_read_config32(get_node_pci(0, 3), 0xe8); @@ -115,7 +113,7 @@ struct node_core_id get_node_core_id(u32 nb_cfg_54) uint32_t f5x84; uint8_t core_count; -#ifdef __PRE_RAM__ +#ifdef __SIMPLE_DEVICE__ f5x84 = pci_read_config32(NODE_PCI(0, 5), 0x84); #else f5x84 = pci_read_config32(get_node_pci(0, 5), 0x84); |