diff options
author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-09-07 18:07:03 -0500 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2015-12-01 16:33:03 +0100 |
commit | 346fcb2894c726574eb55ff08c10fcf10f1de905 (patch) | |
tree | 689b27d486413630301290321c4be3e201418775 /src/cpu/amd | |
parent | 93107bebf6bc4b550bd3a98e466dfe18389659b6 (diff) | |
download | coreboot-346fcb2894c726574eb55ff08c10fcf10f1de905.tar.xz |
cpu/amd/fam10h-15h: Force iolink detect to either 1 or 0
Minor change to be more explicit about the binary state
of the iolink detect variable.
Change-Id: Ifd8f5f1ab28588d100e9e4b1fb0ec2525ad2f552
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12069
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r-- | src/cpu/amd/family_10h-family_15h/init_cpus.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index 635f35787e..22e0cb42f7 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -1244,7 +1244,7 @@ static void cpuSetAMDPCI(u8 node) for (link = 0; link < 4; link++) { if (AMD_CpuFindCapability(node, link, &offset)) { ganged = !!(pci_read_config32(NODE_PCI(node, 0), (link << 2) + 0x170) & 0x1); - iolink = (AMD_checkLinkType(node, link, offset) & HTPHY_LINKTYPE_NONCOHERENT); + iolink = !!(AMD_checkLinkType(node, link, offset) & HTPHY_LINKTYPE_NONCOHERENT); if (!iolink && ganged) { if (probe_filter_enabled) { @@ -1360,7 +1360,7 @@ static void cpuSetAMDPCI(u8 node) for (link = 0; link < 4; link++) { if (AMD_CpuFindCapability(node, link, &offset)) { ganged = !!(pci_read_config32(NODE_PCI(node, 0), (link << 2) + 0x170) & 0x1); - iolink = (AMD_checkLinkType(node, link, offset) & HTPHY_LINKTYPE_NONCOHERENT); + iolink = !!(AMD_checkLinkType(node, link, offset) & HTPHY_LINKTYPE_NONCOHERENT); /* Set defaults */ isoc_rsp_tok_1 = 0; |