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authorStefan Reinauer <reinauer@chromium.org>2012-11-15 16:03:27 -0800
committerRonald G. Minnich <rminnich@gmail.com>2012-11-20 01:52:20 +0100
commit40f36e0d8d15a275d0109eac778e3b99bf4e0173 (patch)
tree8654601a776356770cc85bc190e61c5b9f7af691 /src/cpu/amd
parent0d8267464d093dfddda56e8095c455a8ee96d3e5 (diff)
downloadcoreboot-40f36e0d8d15a275d0109eac778e3b99bf4e0173.tar.xz
Make sure only one udelay function is available
The Agesa wrapper and UDELAY_TIMER2 define their own timer functions, so don't shove in UDELAY_IO Change-Id: Ibe3345e825e0c074d5f531dba1198cd6e7b0a42d Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1864 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/agesa/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index b7e69e015a..39175fc79e 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -29,6 +29,10 @@ config CPU_AMD_AGESA
if CPU_AMD_AGESA
+config UDELAY_IO
+ bool
+ default n
+
config XIP_ROM_SIZE
hex
default 0x100000