diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-07-08 00:37:23 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-07-08 00:37:23 +0000 |
commit | 817d7542f708215c4128b6cdc39ca7d7e1256b26 (patch) | |
tree | 596110d1ac02584dab0e8149011e85d5af37e610 /src/cpu/amd | |
parent | 5e33e827083abe332cf404793d33fa2152a95bab (diff) | |
download | coreboot-817d7542f708215c4128b6cdc39ca7d7e1256b26.tar.xz |
get rid of even more fam10 and k8 warnings.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5659 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd')
-rw-r--r-- | src/cpu/amd/dualcore/dualcore_id.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/init_cpus.c | 15 | ||||
-rw-r--r-- | src/cpu/amd/model_fxx/init_cpus.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/quadcore/quadcore_id.c | 4 |
4 files changed, 11 insertions, 12 deletions
diff --git a/src/cpu/amd/dualcore/dualcore_id.c b/src/cpu/amd/dualcore/dualcore_id.c index 9a1a9c53d4..0eb461f4f8 100644 --- a/src/cpu/amd/dualcore/dualcore_id.c +++ b/src/cpu/amd/dualcore/dualcore_id.c @@ -14,7 +14,7 @@ unsigned int read_nb_cfg_54(void) return ( ( msr.hi >> (54-32)) & 1); } -static inline unsigned get_initial_apicid(void) +u32 get_initial_apicid(void) { return ((cpuid_ebx(1) >> 24) & 0xf); } diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index 15e9ed4f85..52fbdd2658 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -252,12 +252,11 @@ void wait_all_other_cores_started(u32 bsp_apicid) printk(BIOS_DEBUG, "\n"); } -static void allow_all_aps_stop(u32 bsp_apicid) +void allow_all_aps_stop(u32 bsp_apicid) { /* Called by the BSP to indicate AP can stop */ - /* FIXME Do APs use this? - Looks like wait_till_sysinfo_in_ram is used instead. */ + /* FIXME Do APs use this? */ // allow aps to stop use 6 bits for state lapic_write(LAPIC_MSG_REG, (bsp_apicid << 24) | 0x14); @@ -395,15 +394,11 @@ static u32 init_cpus(u32 cpu_init_detectedx) } #endif - /* AP is ready, Wait for the BSP to get memory configured */ - /* FIXME: many cores spinning on node0 pci register seems to be bad. - * Why do we need to wait? These APs are just going to go sit in a hlt. - */ - //wait_till_sysinfo_in_ram(); - + /* AP is ready, configure MTRRs and go to sleep */ set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK); STOP_CAR_AND_CPU(); + printk(BIOS_DEBUG, "\nAP %02x should be halted but you are reading this....\n", apicid); @@ -912,6 +907,7 @@ static void cpuSetAMDPCI(u8 node) printk(BIOS_DEBUG, " done\n"); } +#ifdef UNUSED_CODE static void cpuInitializeMCA(void) { /* Clears Machine Check Architecture (MCA) registers, which power on @@ -939,6 +935,7 @@ static void cpuInitializeMCA(void) } } } +#endif /** * finalize_node_setup() diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c index 23edfa08ae..a318929609 100644 --- a/src/cpu/amd/model_fxx/init_cpus.c +++ b/src/cpu/amd/model_fxx/init_cpus.c @@ -191,7 +191,7 @@ void wait_all_other_cores_started(u32 bsp_apicid) printk(BIOS_DEBUG, "\n"); } -static void allow_all_aps_stop(u32 bsp_apicid) +void allow_all_aps_stop(u32 bsp_apicid) { // allow aps to stop diff --git a/src/cpu/amd/quadcore/quadcore_id.c b/src/cpu/amd/quadcore/quadcore_id.c index 9e4da8b90f..7d09435214 100644 --- a/src/cpu/amd/quadcore/quadcore_id.c +++ b/src/cpu/amd/quadcore/quadcore_id.c @@ -32,7 +32,7 @@ u32 read_nb_cfg_54(void) return ( ( msr.hi >> (54-32)) & 1); } -static u32 get_initial_apicid(void) +u32 get_initial_apicid(void) { return ((cpuid_ebx(1) >> 24) & 0xff); } @@ -67,10 +67,12 @@ struct node_core_id get_node_core_id(u32 nb_cfg_54) return id; } +#ifdef UNUSED_CODE static u32 get_core_num(void) { return (cpuid_ecx(0x80000008) & 0xff); } +#endif static struct node_core_id get_node_core_id_x(void) { |