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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-04-19 19:55:54 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-05-18 06:48:12 +0200 |
| commit | 17bb225be7dd031b9803f33dec88e9d53e3a582f (patch) | |
| tree | 5d16bdb1823eeab9c133c49fdb34a6c7c9fb46b9 /src/cpu/amd | |
| parent | a7dd6455942e17708d5d8da3e1f6c22a8f75ac2e (diff) | |
| download | coreboot-17bb225be7dd031b9803f33dec88e9d53e3a582f.tar.xz | |
AMD MTRR: Add common add_uma_resource_below_tolm()
Change-Id: I9eee88dc619ac5d9c77153db522a6ead65f6c9b1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/mtrr/amd_mtrr.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c index a0a51943ab..9d9d7b7c19 100644 --- a/src/cpu/amd/mtrr/amd_mtrr.c +++ b/src/cpu/amd/mtrr/amd_mtrr.c @@ -11,6 +11,7 @@ * GNU General Public License for more details. */ +#include <cbmem.h> #include <console/console.h> #include <device/device.h> #include <arch/cpu.h> @@ -76,6 +77,23 @@ static void setup_ap_ramtop(void) wrmsr(TOP_MEM2, msr); } +void add_uma_resource_below_tolm(struct device *nb, int idx) +{ + uint32_t topmem = bsp_topmem(); + uint32_t top_of_cacheable = get_top_of_ram(); + + if (top_of_cacheable == topmem) + return; + + uint32_t uma_base = top_of_cacheable; + uint32_t uma_size = topmem - top_of_cacheable; + + printk(BIOS_INFO, "%s: uma size 0x%08x, memory start 0x%08x\n", + __func__, uma_size, uma_base); + + uma_resource(nb, idx, uma_base / KiB, uma_size / KiB); +} + void amd_setup_mtrrs(void) { unsigned long address_bits; |