cpu/armltd/cortex-a9: Remove stub func dead code

Change-Id: Ia8246e2bdf346883072a924d8808f14f48d44bb3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7351
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>

2 files changed, 0 insertions, 45 deletions

diff --git a/src/cpu/armltd/cortex-a9/Makefile.inc b/src/cpu/armltd/cortex-a9/Makefile.inc
deleted file mode 100644
index f1a3689691..0000000000
--- a/src/cpu/armltd/cortex-a9/Makefile.inc
+++ /dev/null
@@ -1,3 +0,0 @@
-ramstage-y += cache.c
-romstage-y += cache.c
-bootblock-y += cache.c
diff --git a/src/cpu/armltd/cortex-a9/cache.c b/src/cpu/armltd/cortex-a9/cache.c
deleted file mode 100644
index 7c91d69f9a..0000000000
--- a/src/cpu/armltd/cortex-a9/cache.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2013 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <armv7.h>
-
-/*
- * Sets L2 cache related parameters before enabling data cache
- */
-void v7_outer_cache_enable(void)
-{
-}
-
-/* stubs so we don't need weak symbols in cache_v7.c */
-void v7_outer_cache_disable(void)
-{
-}
-
-void v7_outer_cache_flush_all(void)
-{
-}
-
-void v7_outer_cache_inval_all(void)
-{
-}
-
-void v7_outer_cache_flush_range(u32 start, u32 end)
-{
-}
-
-void v7_outer_cache_inval_range(u32 start, u32 end)
-{
-}