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author | Eric Biederman <ebiederm@xmission.com> | 2003-04-22 19:02:15 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2003-04-22 19:02:15 +0000 |
commit | 8ca8d7665d671e10d72b8fcb4d69121d75f7906e (patch) | |
tree | daad2699b4e6b6014bce5a76e82dd9c974801777 /src/cpu/i386/entry32.inc | |
parent | b138ac83b53da9abf3dc9a87a1cd4b3d3a8150bd (diff) | |
download | coreboot-8ca8d7665d671e10d72b8fcb4d69121d75f7906e.tar.xz |
- Initial checkin of the freebios2 tree
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/i386/entry32.inc')
-rw-r--r-- | src/cpu/i386/entry32.inc | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/src/cpu/i386/entry32.inc b/src/cpu/i386/entry32.inc new file mode 100644 index 0000000000..8ccd638e95 --- /dev/null +++ b/src/cpu/i386/entry32.inc @@ -0,0 +1,55 @@ +/* For starting linuxBIOS in protected mode */ + +#include <arch/rom_segs.h> + +/* .section ".rom.text" */ + .code32 + + .align 4 +.globl EXT(gdtptr) + +gdt: +EXT(gdtptr): + .word gdt_end - gdt -1 /* compute the table limit */ + .long gdt /* we know the offset */ + .word 0 + +/* flat code segment */ + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + +/* flat data segment */ + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 + +gdt_end: + + +/* + * When we come here we are in protected mode. We expand + * the stack and copies the data segment from ROM to the + * memory. + * + * After that, we call the chipset bootstrap routine that + * does what is left of the chipset initialization. + * + * NOTE aligned to 4 so that we are sure that the prefetch + * cache will be reloaded. + */ + .align 4 +.globl EXT(protected_start) +EXT(protected_start): + + lgdt %cs:gdtptr + ljmp $ROM_CODE_SEG, $__protected_start + +__protected_start: + intel_chip_post_macro(0x10) /* post 10 */ + + movw $ROM_DATA_SEG, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + |