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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-04-12 15:28:34 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-04-12 15:28:34 +0000
commit5934b507d5dcac9063ce180e0fa46be4cc01d69c (patch)
tree960833b901ad5a39f8ccdfba956ff99a5ea9fd88 /src/cpu/intel/bga956
parent09f6718dda28d09312d45f841f585f6e0a4934f7 (diff)
downloadcoreboot-5934b507d5dcac9063ce180e0fa46be4cc01d69c.tar.xz
Move the CPU specific includes from
src/arch/i386/Makefile.inc to the respective CPU directories. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/bga956')
-rw-r--r--src/cpu/intel/bga956/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/bga956/Makefile.inc b/src/cpu/intel/bga956/Makefile.inc
index 8a33d49c93..f4dc9d1a82 100644
--- a/src/cpu/intel/bga956/Makefile.inc
+++ b/src/cpu/intel/bga956/Makefile.inc
@@ -8,3 +8,5 @@ subdirs-y += ../../x86/smm
subdirs-y += ../microcode
subdirs-y += ../hyperthreading
+# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
+cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc