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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-07-07 00:54:05 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-07-07 18:30:55 +0200 |
| commit | 4a45ec43fe73080517fa6f7cad6fa682ad49ecc4 (patch) | |
| tree | 16f852f7658d8d079e34e556b86a13c5f687ad63 /src/cpu/intel/car | |
| parent | cfa9b99b23702ed35d61c9fcf3ad30ec55280174 (diff) | |
| download | coreboot-4a45ec43fe73080517fa6f7cad6fa682ad49ecc4.tar.xz | |
x86: Drop -Wa,--divide
Fix up all the code that is using / to use >> for divisions instead.
Change-Id: I8a6deb0aa090e0df71d90a5509c911b295833cea
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10819
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/car')
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram.inc | 8 | ||||
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram_ht.inc | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index 1d8ea8d844..f9be6e890f 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -195,15 +195,15 @@ clear_fixed_var_mtrr_out: * windowoffset is the 32k-aligned window into CAR size. */ .macro simplemask carsize, windowoffset - .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000) - 4) + .set gas_bug_workaround,(((\carsize - \windowoffset) >> 12) - 4) extractmask gas_bug_workaround, %eax - .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000)) + .set gas_bug_workaround,(((\carsize - \windowoffset) >> 12)) extractmask gas_bug_workaround, %edx /* * Without the gas bug workaround, the entire macro would consist * only of the two lines below: - * extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax - * extractmask (((\carsize - \windowoffset) / 0x1000)), %edx + * extractmask (((\carsize - \windowoffset) >> 12) - 4), %eax + * extractmask (((\carsize - \windowoffset) >> 12)), %edx */ .endm diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc index 29d7113600..193ad418c0 100644 --- a/src/cpu/intel/car/cache_as_ram_ht.inc +++ b/src/cpu/intel/car/cache_as_ram_ht.inc @@ -47,7 +47,7 @@ cache_as_ram: * For hyper-threaded CPUs these are shared. */ movl $mtrr_table, %esi - movl $((mtrr_table_end - mtrr_table) / 2), %edi + movl $((mtrr_table_end - mtrr_table) >> 1), %edi xorl %eax, %eax xorl %edx, %edx clear_mtrrs: @@ -296,7 +296,7 @@ no_msr_11e: cld xorl %eax, %eax movl $CACHE_AS_RAM_BASE, %edi - movl $(CACHE_AS_RAM_SIZE / 4), %ecx + movl $(CACHE_AS_RAM_SIZE >> 2), %ecx rep stosl /* Enable Cache-as-RAM mode by disabling cache. */ |