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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-21 10:12:15 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-23 15:43:58 +0200 |
| commit | d6e96864c9245b82222dada6fea2b89ccb7fecfd (patch) | |
| tree | 9d850d9cfc15d19792da114d426009cc6fb208fa /src/cpu/intel/car | |
| parent | 38424987c6d19015e4572d5371a0f9f621fc46fa (diff) | |
| download | coreboot-d6e96864c9245b82222dada6fea2b89ccb7fecfd.tar.xz | |
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Change-Id: I82e0736dc6b44cfcc57cdfdc786c85c4b6882260
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16276
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Diffstat (limited to 'src/cpu/intel/car')
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram_ht.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc index 0ec2a9d43d..3e2b3e24ac 100644 --- a/src/cpu/intel/car/cache_as_ram_ht.inc +++ b/src/cpu/intel/car/cache_as_ram_ht.inc @@ -87,7 +87,7 @@ addrsize_no_MSR: movl $0x0f, %edx /* Preload high word of address mask (in %edx) for Variable - * MTRRs 0 and 1 and enable local apic at default base. + * MTRRs 0 and 1 and enable local APIC at default base. */ addrsize_set_high: xorl %eax, %eax |