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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-02-11 11:33:36 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-09-19 09:28:39 +0000
commit7841a7f82416e6ad1d00610cca43a3fa9cc6b320 (patch)
treede8b5cfc6fd3b293123f0c413c315dd4d05eabf7 /src/cpu/intel/common/Makefile.inc
parent783982751d26161bb1cb0d923375fabd92940a0f (diff)
downloadcoreboot-7841a7f82416e6ad1d00610cca43a3fa9cc6b320.tar.xz
cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE
To add a common tsc_freq_mhz() implementation, we need to guard againts soc-specific duplicate definitions. Change-Id: I37a34651d9e7d823ad5689d30739294358a97e31 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31341 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: David Guckian Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/common/Makefile.inc')
-rw-r--r--src/cpu/intel/common/Makefile.inc11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/cpu/intel/common/Makefile.inc b/src/cpu/intel/common/Makefile.inc
index 2fc6da908b..c38e81c380 100644
--- a/src/cpu/intel/common/Makefile.inc
+++ b/src/cpu/intel/common/Makefile.inc
@@ -1,5 +1,10 @@
ramstage-y += common_init.c
-romstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
-ramstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
-postcar-$(CONFIG_UDELAY_LAPIC) += fsb.c
+
+ifeq ($(CONFIG_CPU_INTEL_COMMON_TIMEBASE),y)
+bootblock-y += fsb.c
+verstage-y += fsb.c
+romstage-y += fsb.c
+postcar-y += fsb.c
+ramstage-y += fsb.c
smm-y += fsb.c
+endif