cpu/intel/common/fsb.c: Drop CAR_GLOBAL_MIGRATION support

Change-Id: I151090c8d7f670f121dc7e4cbebfd720034fde33
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37051
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 12 insertions, 19 deletions

diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c
index 0004eade89..0f6fd1d921 100644
--- a/src/cpu/intel/common/fsb.c
+++ b/src/cpu/intel/common/fsb.c
@@ -11,7 +11,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/early_variables.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/tsc.h>
 #include <cpu/intel/speedstep.h>
@@ -20,8 +19,8 @@
 #include <commonlib/helpers.h>
 #include <delay.h>
 
-static u32 g_timer_fsb CAR_GLOBAL;
-static u32 g_timer_tsc CAR_GLOBAL;
+static u32 g_timer_fsb;
+static u32 g_timer_tsc;
 
 /* This is not an architectural MSR. */
 #define MSR_PLATFORM_INFO 0xce
@@ -99,8 +98,8 @@ static void resolve_timebase(void)
 	ret = get_fsb_tsc(&fsb, &ratio);
 	if (ret == 0) {
 		u32 tsc = 100 * DIV_ROUND_CLOSEST(ratio * fsb, 100);
-		car_set_var(g_timer_fsb, fsb);
-		car_set_var(g_timer_tsc, tsc);
+		g_timer_fsb = fsb;
+		g_timer_tsc = tsc;
 		return;
 	}
 
@@ -110,33 +109,27 @@ static void resolve_timebase(void)
 		printk(BIOS_ERR, "CPU not supported\n");
 
 	/* Set some semi-ridiculous defaults. */
-	car_set_var(g_timer_fsb, 500);
-	car_set_var(g_timer_tsc, 5000);
+	g_timer_fsb = 500;
+	g_timer_tsc = 5000;
 	return;
 }
 
 u32 get_timer_fsb(void)
 {
-	u32 fsb;
-
-	fsb = car_get_var(g_timer_fsb);
-	if (fsb > 0)
-		return fsb;
+	if (g_timer_fsb > 0)
+		return g_timer_fsb;
 
 	resolve_timebase();
-	return car_get_var(g_timer_fsb);
+	return g_timer_fsb;
 }
 
 unsigned long tsc_freq_mhz(void)
 {
-	u32 tsc;
-
-	tsc = car_get_var(g_timer_tsc);
-	if (tsc > 0)
-		return tsc;
+	if (g_timer_tsc > 0)
+		return g_timer_tsc;
 
 	resolve_timebase();
-	return car_get_var(g_timer_tsc);
+	return g_timer_tsc;
 }
 
 /**