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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-03 13:20:26 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-03 22:23:24 +0000
commitfb50124d22014742b6990a95df87a7a828e891b6 (patch)
tree2de7958eedfd8b2ce34f148af251ad6ce13930e4 /src/cpu/intel/fsp_model_206ax/Kconfig
parentecf2eb463faff04ab6061eb5dfd8da26c5026a97 (diff)
downloadcoreboot-fb50124d22014742b6990a95df87a7a828e891b6.tar.xz
Remove sandybridge and ivybridge FSP code path
We already have two other code paths for this silicon. Maintaining the FSP path as well doesn't make much sense. There was only one board to use this code, and it's a reference board that I doubt anyone still owns or uses. Change-Id: I4fcfa6c56448416624fd26418df19b354eb72f39 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11789 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Diffstat (limited to 'src/cpu/intel/fsp_model_206ax/Kconfig')
-rw-r--r--src/cpu/intel/fsp_model_206ax/Kconfig62
1 files changed, 0 insertions, 62 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
deleted file mode 100644
index 606000e4be..0000000000
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ /dev/null
@@ -1,62 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2013 Sage Electronic Engineering, LLC.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc.
-##
-
-
-config CPU_INTEL_FSP_MODEL_206AX
- bool
-
-config CPU_INTEL_FSP_MODEL_306AX
- bool
-
-if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX
-
-config CPU_SPECIFIC_OPTIONS
- def_bool y
- select PLATFORM_USES_FSP1_0
- select ARCH_BOOTBLOCK_X86_32
- select ARCH_VERSTAGE_X86_32
- select ARCH_ROMSTAGE_X86_32
- select ARCH_RAMSTAGE_X86_32
- select SMP
- select SSE2
- select UDELAY_LAPIC
- select SMM_TSEG
- select SUPPORT_CPU_UCODE_IN_CBFS if HAVE_FSP_BIN
- select PARALLEL_CPU_INIT
- select TSC_SYNC_MFENCE
- select LAPIC_MONOTONIC_TIMER
-
-config BOOTBLOCK_CPU_INIT
- string
- default "cpu/intel/fsp_model_206ax/bootblock.c"
-
-config SMM_TSEG_SIZE
- hex
- default 0x800000
-
-config ENABLE_VMX
- bool "Enable VMX for virtualization"
- default n
-
-config CPU_MICROCODE_CBFS_LOC
- hex
- depends on SUPPORT_CPU_UCODE_IN_CBFS
- default 0xfff70000
-
-endif