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| author | Aaron Durbin <adurbin@chromium.org> | 2013-05-01 15:39:28 -0500 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-07 18:32:41 +0200 |
| commit | 7cb1ba9a61b244800eb65c08729f75d85a504de3 (patch) | |
| tree | d18c0a0964ebc7b92ddc443774055da043dd7a52 /src/cpu/intel/haswell/Kconfig | |
| parent | 935850e08293cec1cb27d12358b27285e780566a (diff) | |
| download | coreboot-7cb1ba9a61b244800eb65c08729f75d85a504de3.tar.xz | |
haswell: use tsc for udelay()
Instead of using the local apic timer for udelay() use the tsc.
That way SMM, romstage, and ramstage all use the same delay
functionality.
Change-Id: I024de5af01eb5de09318e13d0428ee98c132f594
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3169
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel/haswell/Kconfig')
| -rw-r--r-- | src/cpu/intel/haswell/Kconfig | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 13861f9185..152059fcbe 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -8,7 +8,8 @@ config CPU_SPECIFIC_OPTIONS def_bool y select SMP select SSE2 - select UDELAY_LAPIC + select UDELAY_TSC + select TSC_CONSTANT_RATE select SMM_TSEG select SMM_MODULES select RELOCATABLE_MODULES |