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| author | Raul E Rangel <rrangel@chromium.org> | 2018-06-25 14:22:27 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-27 22:12:28 +0000 |
| commit | e18e5ab5fa5002f5835a2b83be0fcd6c5739cd8a (patch) | |
| tree | 7b0064fc8abc7af967cf3a1db19e20d77629efdf /src/cpu/intel/haswell/chip.h | |
| parent | 871156898c874c5247d4024309af348f8bc1e518 (diff) | |
| download | coreboot-e18e5ab5fa5002f5835a2b83be0fcd6c5739cd8a.tar.xz | |
smm: Switch from %edx to %ebx
%edx gets clobbered before the c handler is invoked. This is just a
cleanup cl to make the next cl look clean.
BUG=b:80539294
TEST=verified SMI still works on grunt.
Change-Id: I21bf41ed4fdeaaa8737c883f202a39cb57c2b517
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/27228
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell/chip.h')
0 files changed, 0 insertions, 0 deletions