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| author | Duncan Laurie <dlaurie@chromium.org> | 2013-07-09 15:34:25 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-12-12 22:05:57 +0100 |
| commit | 118d105a375618a8ee8309cd9dcdc17ea6d31f30 (patch) | |
| tree | 4bbfc89771bcf71eb090bf9ae3a90be1091509a2 /src/cpu/intel/haswell/haswell.h | |
| parent | f6d6e62aaf76ba4bef5e0dcdfc73975c25f5337b (diff) | |
| download | coreboot-118d105a375618a8ee8309cd9dcdc17ea6d31f30.tar.xz | |
haswell: Export functions for CPU family+model and stepping
These are needed to enable workarounds/features on specific
CPU types and stepping. The older northbridge function and
defines from sandybridge/ivybridge are removed.
Change-Id: I80370f53590a5caa914ec8cf0095c3177a8b5c89
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61333
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4355
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel/haswell/haswell.h')
| -rw-r--r-- | src/cpu/intel/haswell/haswell.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index e8c224944a..9ed00af632 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -24,8 +24,20 @@ #include <arch/cpu.h> +/* Haswell CPU types */ +#define HASWELL_FAMILY_MOBILE 0x306c0 +#define HASWELL_FAMILY_ULT 0x40650 + +/* Haswell CPU steppings */ +#define HASWELL_STEPPING_MOBILE_A0 1 +#define HASWELL_STEPPING_MOBILE_B0 2 +#define HASWELL_STEPPING_MOBILE_C0 3 +#define HASWELL_STEPPING_MOBILE_D0 4 +#define HASWELL_STEPPING_ULT_B0 0 +#define HASWELL_STEPPING_ULT_C0 1 + /* Haswell bus clock is fixed at 100MHz */ -#define HASWELL_BCLK 100 +#define HASWELL_BCLK 100 #define CORE_THREAD_COUNT_MSR 0x35 #define IA32_FEATURE_CONTROL 0x3a @@ -219,6 +231,11 @@ struct ramstage_cache { char program[0]; } __attribute__((packed)); +/* CPU identification */ +int haswell_family_model(void); +int haswell_stepping(void); +int haswell_is_ult(void); + #endif #endif |