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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-09-09 22:38:06 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-30 06:57:19 +0000 |
| commit | 1d85700503afdb8516ee945e9e294d4a6aa1c759 (patch) | |
| tree | b2aa1a08e18b1ef9821611375b4add51954d7d15 /src/cpu/intel/haswell | |
| parent | b20a600ba736d8d7ed3e67a9d4e001ec044faee2 (diff) | |
| download | coreboot-1d85700503afdb8516ee945e9e294d4a6aa1c759.tar.xz | |
cpu: microcode: Use microcode stored in binary format
Using a copiler to compile something that's already a binary is pretty
stupid. Now that Stefan converted most microcode in blobs to a plain
binary, use the binary version.
Change-Id: Iecf1f0cdf7bbeb7a61f46a0cd984ba341af787ce
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11607
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/intel/haswell')
| -rw-r--r-- | src/cpu/intel/haswell/Makefile.inc | 5 | ||||
| -rw-r--r-- | src/cpu/intel/haswell/microcode_blob.c | 30 |
2 files changed, 3 insertions, 32 deletions
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index a4a9c34475..d54a25c249 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -10,8 +10,6 @@ ramstage-y += monotonic_timer.c romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c -cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c - smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c smm-y += monotonic_timer.c @@ -25,3 +23,6 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../turbo + +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_306cx/microcode.bin +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_4065x/microcode.bin diff --git a/src/cpu/intel/haswell/microcode_blob.c b/src/cpu/intel/haswell/microcode_blob.c deleted file mode 100644 index 67ab1cd682..0000000000 --- a/src/cpu/intel/haswell/microcode_blob.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -unsigned microcode[] = { - /* - * FIXME: Can we just include both microcodes regardless, or is there - * a very good reason why we only use one at a time? - */ - #if CONFIG_INTEL_LYNXPOINT_LP - #include "../../../../3rdparty/blobs/cpu/intel/model_4065x/microcode.h" - #else - #include "../../../../3rdparty/blobs/cpu/intel/model_306cx/microcode.h" - #endif -}; |