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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-17 07:54:36 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-18 19:59:38 +0200 |
| commit | 9d2762ca6f2c0414afdca210ba996db7a0956690 (patch) | |
| tree | 91083adaa53fae278bbad0f8452de134eb8b6524 /src/cpu/intel/haswell | |
| parent | e813c15443c90ad09d9182f3cca94937df124847 (diff) | |
| download | coreboot-9d2762ca6f2c0414afdca210ba996db7a0956690.tar.xz | |
intel cache_as_ram: Fix typo in comment
Change-Id: I2539e490e160e01cab2ad8d2086d2f242a88c640
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15223
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/intel/haswell')
| -rw-r--r-- | src/cpu/intel/haswell/cache_as_ram.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc index e09e74b6c2..2ccef786fa 100644 --- a/src/cpu/intel/haswell/cache_as_ram.inc +++ b/src/cpu/intel/haswell/cache_as_ram.inc @@ -236,7 +236,7 @@ before_romstage: post_code(0x38) - /* Setup stack as indicated by return value from ramstage_main(). */ + /* Setup stack as indicated by return value from romstage_main(). */ movl %ebx, %esp /* Get number of MTRRs. */ |