summaryrefslogtreecommitdiff
path: root/src/cpu/intel/haswell
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-02-11 11:36:17 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-24 22:56:16 +0000
commitc00e2fb9966a9c4bd30944a198ad036ee81a2b0d (patch)
tree5b197ed44869259c2fcfbe0a32b4c758688d8ef4 /src/cpu/intel/haswell
parent52b1e2814a2c31001df43190574cdc5f0ed4bcbb (diff)
downloadcoreboot-c00e2fb9966a9c4bd30944a198ad036ee81a2b0d.tar.xz
cpu/intel: Use CPU_INTEL_COMMON_TIMEBASE
Change-Id: I0e7159039751a88d86b6c343be5f085e6e15570a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/intel/haswell')
-rw-r--r--src/cpu/intel/haswell/Kconfig1
-rw-r--r--src/cpu/intel/haswell/Makefile.inc8
-rw-r--r--src/cpu/intel/haswell/tsc_freq.c25
3 files changed, 1 insertions, 33 deletions
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 8f91b60953..db119a05cc 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -22,6 +22,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select PARALLEL_MP
select CPU_INTEL_COMMON
+ select CPU_INTEL_COMMON_TIMEBASE
select NO_FIXED_XIP_ROM_SIZE
config SMM_TSEG_SIZE
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index d46a422e4a..7661a4e2d8 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -1,27 +1,19 @@
ramstage-y += haswell_init.c
-ramstage-y += tsc_freq.c
romstage-y += romstage.c
-romstage-y += tsc_freq.c
romstage-y += ../car/romstage.c
-postcar-y += tsc_freq.c
-
ramstage-y += acpi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
smm-y += finalize.c
-smm-y += tsc_freq.c
bootblock-y += ../car/non-evict/cache_as_ram.S
bootblock-y += ../car/bootblock.c
bootblock-y += ../../x86/early_reset.S
bootblock-y += bootblock.c
-bootblock-y += tsc_freq.c
postcar-y += ../car/non-evict/exit_car.S
-verstage-y += tsc_freq.c
-
subdirs-y += ../../x86/tsc
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
diff --git a/src/cpu/intel/haswell/tsc_freq.c b/src/cpu/intel/haswell/tsc_freq.c
deleted file mode 100644
index 0d89f3af53..0000000000
--- a/src/cpu/intel/haswell/tsc_freq.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/tsc.h>
-#include "cpu/intel/haswell/haswell.h"
-
-unsigned long tsc_freq_mhz(void)
-{
- msr_t platform_info;
-
- platform_info = rdmsr(MSR_PLATFORM_INFO);
- return HASWELL_BCLK * ((platform_info.lo >> 8) & 0xff);
-}