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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-07 20:26:36 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-21 06:20:44 +0200 |
| commit | 3d45c4077665a17735c69576638dc510f96a2dff (patch) | |
| tree | b245303e94318cab2633e7e4785e84b73cfc3b50 /src/cpu/intel/haswell | |
| parent | b766b1c76aa2258bf66569f429fb092c23813bbc (diff) | |
| download | coreboot-3d45c4077665a17735c69576638dc510f96a2dff.tar.xz | |
timestamps: Stash early timestamps in CAR_GLOBAL
Change-Id: I87b454c748cf885491d5b38bfe53a2ec0e9f38c5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3910
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/cpu/intel/haswell')
| -rw-r--r-- | src/cpu/intel/haswell/romstage.c | 29 |
1 files changed, 7 insertions, 22 deletions
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 06e3a8516a..e62b894bb9 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -200,16 +200,8 @@ void romstage_common(const struct romstage_params *params) int wake_from_s3; struct romstage_handoff *handoff; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif - -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (params->bist == 0) enable_lapic(); @@ -249,17 +241,15 @@ void romstage_common(const struct romstage_params *params) post_code(0x3a); params->pei_data->boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); report_platform_info(); sdram_initialize(params->pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); + post_code(0x3b); intel_early_me_status(); @@ -288,13 +278,8 @@ void romstage_common(const struct romstage_params *params) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif } static inline void prepare_for_resume(struct romstage_handoff *handoff) |