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| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-29 00:53:13 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-15 22:50:39 +0000 |
| commit | a1dfce1ce055b853c8499185d05e4aa7ba8e0614 (patch) | |
| tree | 2156e88d3ed3037e5b531fe1506655bdc3d61bc8 /src/cpu/intel/haswell | |
| parent | e5a7a1f31428c8eaad6c71a01c86645cf435a0fe (diff) | |
| download | coreboot-a1dfce1ce055b853c8499185d05e4aa7ba8e0614.tar.xz | |
x4x boards: Factor out MAX_CPUS
LGA775 CPUs can have at most 4 threads, and Eaglelake supports them.
As this socket is also used by other chipsets, temporarily place this
symbol into the northbridge scope until all chipsets are factored out.
Change-Id: I6e01363d995e135815cc70779e0cd5baf806cf60
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41841
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/cpu/intel/haswell')
0 files changed, 0 insertions, 0 deletions