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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-03 19:37:45 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-06-21 09:18:43 +0000 |
| commit | fb626dcd78a2a61af728b5479d3babb3ea7e5b36 (patch) | |
| tree | 1540e49ab68d869713ff7707ade58debb3f33d7f /src/cpu/intel/haswell | |
| parent | 319f0370bfe99ce47ea8b883696ad89d19b7c4b9 (diff) | |
| download | coreboot-fb626dcd78a2a61af728b5479d3babb3ea7e5b36.tar.xz | |
cpu/intel/haswell: Link tsc_freq.c in the bootblock
This provides tsc_freq_mhz implementation.
Change-Id: Ic6a84336f89a37aa412a9cc8c375fbd41dc09cf2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33176
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/cpu/intel/haswell')
| -rw-r--r-- | src/cpu/intel/haswell/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index f83d5db970..1e7d226c51 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -25,6 +25,7 @@ bootblock-y += ../car/non-evict/cache_as_ram.S bootblock-y += ../car/bootblock.c bootblock-y += ../../x86/early_reset.S bootblock-y += bootblock.c +bootblock-y += tsc_freq.c postcar-y += ../car/non-evict/exit_car.S |