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author | Nico Huber <nico.huber@secunet.com> | 2012-09-06 17:46:30 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-02 20:09:57 +0100 |
commit | ad874e3477ba391d8fe02b0cab6334be67e2e303 (patch) | |
tree | 6459a15ed1637c1ef97c12f246264bcd09bdae83 /src/cpu/intel/hyperthreading | |
parent | 336db54a00daab2d6b49a51eb87fe71bff934166 (diff) | |
download | coreboot-ad874e3477ba391d8fe02b0cab6334be67e2e303.tar.xz |
Correct FSB reading in speedstep ACPI
We parsed the MSR the wrong way, and didn't support some valid values.
Change-Id: Ia42e3de05dd76b6830aaa310ec82031d36def3a0
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1656
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/intel/hyperthreading')
0 files changed, 0 insertions, 0 deletions