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| author | Edward O'Callaghan <quasisec@chromium.org> | 2019-10-30 10:00:33 +1100 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2019-11-07 06:23:55 +0000 |
| commit | 881f9cb7154ce9a7538507bb872041a2f41a002b (patch) | |
| tree | 9930a70b1a4b4ae48ac48f378b4d256c79a24e0c /src/cpu/intel/hyperthreading | |
| parent | 46b125ab6bfd5afa72a10eed70af9196e2a8b79c (diff) | |
| download | coreboot-881f9cb7154ce9a7538507bb872041a2f41a002b.tar.xz | |
mainboard/google: Allow Hatch variants to read SPD data over SMBus
All Hatch variants so far embed static SPD data encoded within the
firmware image. However we wish the flexibility for romstage
implementations that allow for reading the SPD data dynamically over
SMBus. This romstage variant allows for reading the SPD data over
SMBus.
V.2: Dispence with memcpy().
V.3: Revert back to previous patch with memcpy().
V.4: Rewrite again to avoid memcpy().
BRANCH=none
BUG=b:143134702
TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: I3516a46b91840a9f6d1f4cffb2553d939d79cda2
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36449
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/hyperthreading')
0 files changed, 0 insertions, 0 deletions