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| author | Liu Tao <liutao1980@gmail.com> | 2010-10-17 21:59:43 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-17 21:59:43 +0000 |
| commit | 676d0298a1d3853034d86053dd71d3b4065c4026 (patch) | |
| tree | 352091b60ee711bf0318c10285bf52c77b148190 /src/cpu/intel/microcode | |
| parent | dfecd2740b9ecc6950bf08b8b40573158541d56a (diff) | |
| download | coreboot-676d0298a1d3853034d86053dd71d3b4065c4026.tar.xz | |
In the RS780/RS690 ProgK8TempMmioBase() function, the dst-link field is set
to zero, so for boards with RS780 not on CPU's HT chain 0, the function will
mis-configure the MMIO dst-link routing, and the following enable_pcie_bar3()
function will hang when it visits the MMIO.
The following patch fixes the problem, and is tested on a K8 board with RS780
on HT chain 1.
Signed-off-by: Liu Tao <liutao1980@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/microcode')
0 files changed, 0 insertions, 0 deletions