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authorAaron Durbin <adurbin@chromium.org>2015-05-15 23:39:23 -0500
committerPatrick Georgi <pgeorgi@google.com>2015-06-02 14:09:31 +0200
commit899d13d0dff9e7495eb17950f19431e9bd344b2f (patch)
tree8901845fc299126a7125ff19fe1f7bde17e3f305 /src/cpu/intel/microcode
parent68bdd00799c7b2b25f265fa9e31beb709c877eb6 (diff)
downloadcoreboot-899d13d0dff9e7495eb17950f19431e9bd344b2f.tar.xz
cbfs: new API and better program loading
A new CBFS API is introduced to allow making CBFS access easier for providing multiple CBFS sources. That is achieved by decoupling the cbfs source from a CBFS file. A CBFS source is described by a descriptor. It contains the necessary properties for walking a CBFS to locate a file. The CBFS file is then decoupled from the CBFS descriptor in that it's no longer needed to access the contents of the file. All of this is accomplished using the regions infrastructure by repsenting CBFS sources and files as region_devices. Because region_devices can be chained together forming subregions this allows one to decouple a CBFS source from a file. This also allows one to provide CBFS files that came from other sources for payload and/or stage loading. The program loading takes advantage of those very properties by allowing multiple sources for locating a program. Because of this we can reduce the overhead of loading programs because it's all done in the common code paths. Only locating the program is per source. Change-Id: I339b84fce95f03d1dbb63a0f54a26be5eb07f7c8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9134 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/intel/microcode')
-rw-r--r--src/cpu/intel/microcode/microcode.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 88435cc9b5..3492bfd6c9 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -109,25 +109,29 @@ void intel_microcode_load_unlocked(const void *microcode_patch)
const void *intel_microcode_find(void)
{
- struct cbfs_file *microcode_file;
const struct microcode *ucode_updates;
- u32 eax, microcode_len;
+ size_t microcode_len;
+ u32 eax;
u32 pf, rev, sig, update_size;
unsigned int x86_model, x86_family;
msr_t msr;
#ifdef __PRE_RAM__
- microcode_file = walkcbfs_head((char *) MICROCODE_CBFS_FILE);
-#else
- microcode_file = cbfs_get_file(CBFS_DEFAULT_MEDIA,
- MICROCODE_CBFS_FILE);
-#endif
+ struct cbfs_file *microcode_file;
+ microcode_file = walkcbfs_head((char *) MICROCODE_CBFS_FILE);
if (!microcode_file)
return NULL;
ucode_updates = CBFS_SUBHEADER(microcode_file);
microcode_len = ntohl(microcode_file->len);
+#else
+ ucode_updates = cbfs_boot_map_with_leak(MICROCODE_CBFS_FILE,
+ CBFS_TYPE_MICROCODE,
+ &microcode_len);
+ if (ucode_updates == NULL)
+ return NULL;
+#endif
/* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
msr.lo = 0;