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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-22 11:42:32 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-22 11:42:32 +0000 |
| commit | c02b4fc9db3c3c1e263027382697b566127f66bb (patch) | |
| tree | 11bd18488e360e5c1beeb9ccb852ef4489c3689a /src/cpu/intel/model_106cx/cache_as_ram_disable.c | |
| parent | 27852aba6787617ca5656995cbc7e8ef0a3ea22c (diff) | |
| download | coreboot-c02b4fc9db3c3c1e263027382697b566127f66bb.tar.xz | |
printk_foo -> printk(BIOS_FOO, ...)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_106cx/cache_as_ram_disable.c')
| -rw-r--r-- | src/cpu/intel/model_106cx/cache_as_ram_disable.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/intel/model_106cx/cache_as_ram_disable.c b/src/cpu/intel/model_106cx/cache_as_ram_disable.c index 4d108765c5..b9f7f669f9 100644 --- a/src/cpu/intel/model_106cx/cache_as_ram_disable.c +++ b/src/cpu/intel/model_106cx/cache_as_ram_disable.c @@ -36,12 +36,12 @@ void stage1_main(unsigned long bist) "movl %%esp, %0\n\t" : "=a" (v_esp) ); - printk_spew("v_esp=%08x\r\n", v_esp); + printk(BIOS_SPEW, "v_esp=%08x\r\n", v_esp); } cpu_reset_x: - printk_spew("cpu_reset = %08x\r\n",cpu_reset); + printk(BIOS_SPEW, "cpu_reset = %08x\r\n",cpu_reset); if(cpu_reset == 0) { print_spew("Clearing initial memory region: "); |