summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_106cx
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coreboot.org>2010-12-11 22:14:44 +0000
committerStefan Reinauer <stepan@openbios.org>2010-12-11 22:14:44 +0000
commit2a27b20226a2fd593bfd5f6a0eee45418233fe04 (patch)
tree950aa542d9266c1cb004d2346062609c37ed16b3 /src/cpu/intel/model_106cx
parent2b9070a610132eaf61dca67e7713c082903fffef (diff)
downloadcoreboot-2a27b20226a2fd593bfd5f6a0eee45418233fe04.tar.xz
factor out cpu power management base into a separate file. And fix a bug in
model_1067x Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_106cx')
-rw-r--r--src/cpu/intel/model_106cx/model_106cx_init.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index f83a0bbbf0..2e38e775a6 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -26,6 +26,7 @@
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
+#include <cpu/intel/speedstep.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
@@ -82,9 +83,7 @@ static void enable_vmx(void)
#define PMG_CST_CONFIG_CONTROL 0xe2
#define PMG_IO_BASE_ADDR 0xe3
#define PMG_IO_CAPTURE_ADDR 0xe4
-#define PMB0 0x510 /* analogous to P_BLK in cpu.asl */
-#define PMB1 0x0 /* IO port that triggers SMI once cores are in the same state.
- See CSM Trigger, at PMG_CST_CONFIG_CONTROL[6:4] */
+
#define HIGHEST_CLEVEL 3
static void configure_c_states(void)
{