diff options
author | Matt DeVillier <matt.devillier@gmail.com> | 2016-12-14 16:12:43 -0600 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2016-12-27 02:30:08 +0100 |
commit | ed6fe2f64b37d0c6161b23b20980f91e0be7a1ea (patch) | |
tree | 99aa4d662a9210e157672d26b801c0a1fc78ccf4 /src/cpu/intel/model_2065x | |
parent | 2a5897526463dfe00feb06d99f850c2874d1d257 (diff) | |
download | coreboot-ed6fe2f64b37d0c6161b23b20980f91e0be7a1ea.tar.xz |
cpu/intel/common: Add/Use common function to set virtualization
Migrate duplicated enable_vmx() method from multiple CPUs to common
folder. Add common virtualization option for CPUs which support it.
Note that this changes the default to enable virtualization on CPUs
that support it.
Change-Id: Ib110bed6c9f5508e3f867dcdc6f341fc50e501d1
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17874
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/intel/model_2065x')
-rw-r--r-- | src/cpu/intel/model_2065x/Kconfig | 5 | ||||
-rw-r--r-- | src/cpu/intel/model_2065x/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/intel/model_2065x/model_2065x_init.c | 55 |
3 files changed, 5 insertions, 56 deletions
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index f6d812fad8..59bb8d8b86 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -19,6 +19,7 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE + select CPU_INTEL_COMMON config BOOTBLOCK_CPU_INIT string @@ -28,10 +29,6 @@ config SMM_TSEG_SIZE hex default 0x800000 -config ENABLE_VMX - bool "Enable VMX for virtualization" - default n - config XIP_ROM_SIZE hex default 0x20000 diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index cdf9fed3e2..137d1c94d0 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -8,6 +8,7 @@ subdirs-y += ../../intel/turbo subdirs-y += ../../intel/microcode subdirs-y += ../../x86/smm subdirs-y += ../smm/gen1 +subdirs-y += ../common ramstage-y += tsc_freq.c romstage-y += tsc_freq.c diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 7987f8e36a..9bc9df1e99 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -32,6 +32,7 @@ #include "model_2065x.h" #include "chip.h" #include <cpu/intel/smm/gen1/smi.h> +#include <cpu/intel/common/common.h> /* * List of supported C-states in this processor @@ -132,56 +133,6 @@ int cpu_get_apic_id_map(int *apic_id_map) return threads_per_package; } -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - int enable = CONFIG_ENABLE_VMX; - - regs = cpuid(1); - /* Check that the VMX is supported before reading or writing the MSR. */ - if (!((regs.ecx & CPUID_VMX) || (regs.ecx & CPUID_SMX))) - return; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n", __func__); - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - /* The IA32_FEATURE_CONTROL MSR may initialize with random values. - * It must be cleared regardless of VMX config setting. - */ - msr.hi = msr.lo = 0; - - printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling"); - - /* Even though the Intel manual says you must set the lock bit in addition - * to the VMX bit in order for VMX to work, it is incorrect. Thus we leave - * it unlocked for the OS to manage things itself. This is good for a few - * reasons: - * - No need to reflash the bios just to toggle the lock bit. - * - The VMX bits really really should match each other across cores, so - * hard locking it on one while another has the opposite setting can - * easily lead to crashes as code using VMX migrates between them. - * - Vendors that want to "upsell" from a bios that disables+locks to - * one that doesn't is sleazy. - * By leaving this to the OS (e.g. Linux), people can do exactly what they - * want on the fly, and do it correctly (e.g. across multiple cores). - */ - if (enable) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); -} - int cpu_config_tdp_levels(void) { @@ -383,8 +334,8 @@ static void model_2065x_init(struct device *cpu) enable_lapic_tpr(); setup_lapic(); - /* Enable virtualization if enabled in CMOS */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure Enhanced SpeedStep and Thermal Sensors */ configure_misc(); |