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author | Martin Roth <martinroth@google.com> | 2017-06-24 13:43:40 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-06-28 17:48:42 +0000 |
commit | ffdee287df7a294396f1c935e1171dad7c44dbf3 (patch) | |
tree | 2a213a933512f1cfe75ef01e954facb90bdf7656 /src/cpu/intel/model_2065x | |
parent | 5f46af6325b5facb9a608b0f86595b92b98ed718 (diff) | |
download | coreboot-ffdee287df7a294396f1c935e1171dad7c44dbf3.tar.xz |
cpu/intel: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: Ie685bbbb1cbf06d32631ea40ad120b6f45374b2e
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20336
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/intel/model_2065x')
-rw-r--r-- | src/cpu/intel/model_2065x/bootblock.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/model_2065x/model_2065x_init.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/intel/model_2065x/bootblock.c b/src/cpu/intel/model_2065x/bootblock.c index a57f166d48..ed528d1bdd 100644 --- a/src/cpu/intel/model_2065x/bootblock.c +++ b/src/cpu/intel/model_2065x/bootblock.c @@ -23,7 +23,7 @@ #include <cpu/intel/microcode/microcode.c> -#if CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK) #include <southbridge/intel/ibexpeak/pch.h> #include "model_2065x.h" #else diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index fe095c409d..f7e6c1dc91 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -295,7 +295,7 @@ static void intel_cores_init(struct device *cpu) cpu->path.apic.apic_id, new->path.apic.apic_id); -#if CONFIG_SMP && CONFIG_MAX_CPUS > 1 +#if IS_ENABLED(CONFIG_SMP) && CONFIG_MAX_CPUS > 1 /* Start the new CPU */ if (!start_cpu(new)) { /* Record the error in cpu? */ |