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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 18:11:03 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 11:47:58 +0000 |
| commit | 360d94745feea766de7ef19487ba9158221faca0 (patch) | |
| tree | 757402cd145f8f791cfa9594570e4d2a5d5f026c /src/cpu/intel/model_206ax/Kconfig | |
| parent | 67d59d1756423a96aca5249b59c4e3759b2f3721 (diff) | |
| download | coreboot-360d94745feea766de7ef19487ba9158221faca0.tar.xz | |
nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK
There is some overlap between romstage and bootblock.
LPC setup and BAR initialization is now done twice.
The rationale is that the romstage should not depend too
much on the bootblock, since it can reside in a RO fmap
region.
Enabling the console will be done in a followup patch.
Change-Id: I4d0ba29111a5df6f19033f5ce95adcc0d9adc1fd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36783
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/intel/model_206ax/Kconfig')
| -rw-r--r-- | src/cpu/intel/model_206ax/Kconfig | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 8dae6ecc30..223703eb84 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -21,10 +21,8 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_COMMON_TIMEBASE select PARALLEL_MP select NO_FIXED_XIP_ROM_SIZE - -config BOOTBLOCK_CPU_INIT - string - default "cpu/intel/model_206ax/bootblock.c" + select C_ENVIRONMENT_BOOTBLOCK + select NO_BOOTBLOCK_CONSOLE config SMM_TSEG_SIZE hex |