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author | Arthur Heymans <arthur@aheymans.xyz> | 2018-02-05 19:08:03 +0100 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-04-10 09:30:21 +0000 |
commit | 67031a565b3179fa5a28282fc2e24b47d16003e8 (patch) | |
tree | d56eaf320fcdc2b2940a24d77c20077fb970951c /src/cpu/intel/model_206ax/model_206ax.h | |
parent | 64f0bcb6b0c4ee0fb55e6e600a48a1c61d2e97ef (diff) | |
download | coreboot-67031a565b3179fa5a28282fc2e24b47d16003e8.tar.xz |
cpu/intel/sandybridge: Put stage cache into TSEG
TSEG is not accessible in ring 0 after it is locked in ramstage, in
contrast with cbmem which remains accessible. Assuming SMM does not
touch the cache this is a good region to cache stages.
The code is mostly copied from src/cpu/intel/haswell.
TESTED on Thinkpad X220: on a cold boot the stage cache gets created
and on S3 the cached ramstage gets properly used.
Change-Id: Ifd8f939416b1712f6e5c74f544a5828745f8c2f2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/model_206ax/model_206ax.h')
-rw-r--r-- | src/cpu/intel/model_206ax/model_206ax.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index 594dde143c..962b8302eb 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -92,6 +92,28 @@ #define PSS_LATENCY_TRANSITION 10 #define PSS_LATENCY_BUSMASTER 10 +/* + * Region of SMM space is reserved for multipurpose use. It falls below + * the IED region and above the SMM handler. + */ +#define RESERVED_SMM_SIZE CONFIG_SMM_RESERVED_SIZE +#define RESERVED_SMM_OFFSET \ + (CONFIG_SMM_TSEG_SIZE - CONFIG_IED_REGION_SIZE - RESERVED_SMM_SIZE) + +/* Sanity check config options. */ +#if (CONFIG_SMM_TSEG_SIZE <= (CONFIG_IED_REGION_SIZE + RESERVED_SMM_SIZE)) +# error "CONFIG_SMM_TSEG_SIZE <= (CONFIG_IED_REGION_SIZE + RESERVED_SMM_SIZE)" +#endif +#if (CONFIG_SMM_TSEG_SIZE < 0x800000) +# error "CONFIG_SMM_TSEG_SIZE must at least be 8MiB" +#endif +#if ((CONFIG_SMM_TSEG_SIZE & (CONFIG_SMM_TSEG_SIZE - 1)) != 0) +# error "CONFIG_SMM_TSEG_SIZE is not a power of 2" +#endif +#if ((CONFIG_IED_REGION_SIZE & (CONFIG_IED_REGION_SIZE - 1)) != 0) +# error "CONFIG_IED_REGION_SIZE is not a power of 2" +#endif + #ifdef __SMM__ /* Lock MSRs */ void intel_model_206ax_finalize_smm(void); |