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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-15 17:52:06 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-16 04:13:50 +0100 |
| commit | 73a28942031675fce20d6649d2c2ce66fe62f416 (patch) | |
| tree | d225fe29f105a2c745edb1c56f348f2c937eaeb2 /src/cpu/intel/model_206ax | |
| parent | 4239ff37b7711bd81bc5ab96bb135b3c977aa2b5 (diff) | |
| download | coreboot-73a28942031675fce20d6649d2c2ce66fe62f416.tar.xz | |
cpu/intel: Add int to unsigned
Fix the following warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
TEST=Build and run on Galileo Gen2
Change-Id: I207713a3370e5a9abed4535187aa2aaeef502d6f
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18848
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/intel/model_206ax')
| -rw-r--r-- | src/cpu/intel/model_206ax/bootblock.c | 4 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/finalize.c | 2 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 8 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c index eaa1870d7a..493d08932c 100644 --- a/src/cpu/intel/model_206ax/bootblock.c +++ b/src/cpu/intel/model_206ax/bootblock.c @@ -31,8 +31,8 @@ #error "CPU must be paired with Intel BD82X6X or C216 southbridge" #endif -static void set_var_mtrr( - unsigned reg, unsigned base, unsigned size, unsigned type) +static void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size, + unsigned int type) { /* Bit Bit 32-35 of MTRRphysMask should be set to 1 */ diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c index 870750cc9b..50f49772d4 100644 --- a/src/cpu/intel/model_206ax/finalize.c +++ b/src/cpu/intel/model_206ax/finalize.c @@ -26,7 +26,7 @@ * Document Number 504790 * Revision 1.6.0, June 2012 */ -static void msr_set_bit(unsigned reg, unsigned bit) +static void msr_set_bit(unsigned int reg, unsigned int bit) { msr_t msr = rdmsr(reg); diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 600d243cd3..2722454778 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -190,8 +190,8 @@ void set_power_limits(u8 power_limit_1_time) { msr_t msr = rdmsr(MSR_PLATFORM_INFO); msr_t limit; - unsigned power_unit; - unsigned tdp, min_power, max_power, max_time; + unsigned int power_unit; + unsigned int tdp, min_power, max_power, max_time; u8 power_limit_1_val; if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr)) @@ -424,7 +424,7 @@ static void configure_mca(void) int cpu_get_apic_id_map(int *apic_id_map) { struct cpuid_result result; - unsigned threads_per_package, threads_per_core, i, shift = 0; + unsigned int threads_per_package, threads_per_core, i, shift = 0; /* Logical processors (threads) per core */ result = cpuid_ext(0xb, 0); @@ -449,7 +449,7 @@ int cpu_get_apic_id_map(int *apic_id_map) static void intel_cores_init(struct device *cpu) { struct cpuid_result result; - unsigned threads_per_package, threads_per_core, i; + unsigned int threads_per_package, threads_per_core, i; /* Logical processors (threads) per core */ result = cpuid_ext(0xb, 0); |