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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-05-06 17:24:59 +1000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2014-05-07 21:36:48 +0200 |
| commit | bf9f24385739d29dd5ccea82dec06e1cdd2c10fe (patch) | |
| tree | adbae911ec08d0aff6db0dcb9ccd9b3d92a87eaa /src/cpu/intel/model_67x | |
| parent | d520840d4ca7d8fbd9c64946ee5f2d7ea44b8557 (diff) | |
| download | coreboot-bf9f24385739d29dd5ccea82dec06e1cdd2c10fe.tar.xz | |
superio/common/conf_mode: Provide another common pnp entry/exit
ITE Super I/O's make use of this method to enter and exit in and out of
their PNP configuration. Provide functions for use in ram stage
component.
Change-Id: I2b546c2b17eefc89aaab4982192f5e9a15a16c2f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5666
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/cpu/intel/model_67x')
0 files changed, 0 insertions, 0 deletions