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| author | Gaggery Tsai <gaggery.tsai@intel.com> | 2020-01-08 15:22:13 -0800 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-01-18 12:03:17 +0000 |
| commit | 39e1f44f331040b2e9574e9c792f583b8c6a5aba (patch) | |
| tree | 96b3a479ae3107442e01c612eaf588dee0759daa /src/cpu/intel/model_67x | |
| parent | 06a078a06723ec5c085b6a8df3adee98e6171b5f (diff) | |
| download | coreboot-39e1f44f331040b2e9574e9c792f583b8c6a5aba.tar.xz | |
soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs
This patch adds CML-S 2 and 4-Core MCH IDs and fix wrong ID for
10-Core ID.
Change-Id: I30f6c8a5234b7754d984b598bf7bae103ec9712e
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/intel/model_67x')
0 files changed, 0 insertions, 0 deletions