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author | Eric Biederman <ebiederm@xmission.com> | 2004-10-27 01:18:16 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2004-10-27 01:18:16 +0000 |
commit | 3566b3d545dd13f3760e6aa1fc50159243991e1d (patch) | |
tree | 2d35076ba899562ce61837e4d272f27537b0dd78 /src/cpu/intel/model_69x/model_69x_init.c | |
parent | eefdb038981a0fcc93df5c6c934f8138a43873bb (diff) | |
download | coreboot-3566b3d545dd13f3760e6aa1fc50159243991e1d.tar.xz |
- Bug fixes to the P-III support
- Initial Pentium-M support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_69x/model_69x_init.c')
-rw-r--r-- | src/cpu/intel/model_69x/model_69x_init.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c new file mode 100644 index 0000000000..43c1f252a7 --- /dev/null +++ b/src/cpu/intel/model_69x/model_69x_init.c @@ -0,0 +1,49 @@ +#include <console/console.h> +#include <device/device.h> +#include <device/device.h> +#include <device/pci.h> +#include <string.h> +#include <cpu/cpu.h> +#include <cpu/x86/mtrr.h> +#include <cpu/x86/msr.h> +#include <cpu/x86/lapic.h> +#include <cpu/intel/microcode.h> +#include <cpu/x86/cache.h> +#include <cpu/x86/mtrr.h> + +static uint32_t microcode_updates[] = { + /* Dummy terminator */ + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, +}; + + +static void model_69x_init(device_t dev) +{ + /* Turn on caching if we haven't already */ + x86_enable_cache(); + x86_mtrr_check(); + + /* Update the microcode */ + intel_update_microcode(microcode_updates); + + /* Enable the local cpu apics */ + setup_lapic(); +}; + +static struct device_operations cpu_dev_ops = { + .init = model_69x_init, +}; +static struct cpu_device_id cpu_table[] = { +#if 0 + { X86_VENDOR_INTEL, 0x0695 }, /* Pentium M */ +#endif + { 0, 0 }, +}; + +static struct cpu_driver driver __cpu_driver = { + .ops = &cpu_dev_ops, + .id_table = cpu_table, +}; |