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authorEric Biederman <ebiederm@xmission.com>2004-10-27 01:18:47 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-27 01:18:47 +0000
commitdfde9bb64953d2f7c792a67e0e231eb5cabcd673 (patch)
tree6ffe40324f14e8bd97dd9b7afd038d973ca40426 /src/cpu/intel/model_6dx
parent3566b3d545dd13f3760e6aa1fc50159243991e1d (diff)
downloadcoreboot-dfde9bb64953d2f7c792a67e0e231eb5cabcd673.tar.xz
- Actually enable the Pentium-M cpus
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_6dx')
-rw-r--r--src/cpu/intel/model_6dx/model_6dx_init.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c
index b646066eb6..ca00df43b4 100644
--- a/src/cpu/intel/model_6dx/model_6dx_init.c
+++ b/src/cpu/intel/model_6dx/model_6dx_init.c
@@ -37,9 +37,7 @@ static struct device_operations cpu_dev_ops = {
.init = model_6dx_init,
};
static struct cpu_device_id cpu_table[] = {
-#if 0
{ X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2 cache */
-#endif
{ 0, 0 },
};