summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_6ex
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-08-14 20:38:17 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-14 20:38:17 +0000
commit30584912579d050c6bb3de3d55ca887e6ae094b5 (patch)
tree5f9aa4fc54cf26b33d756dfe2c693155d71dd143 /src/cpu/intel/model_6ex
parentb24d07c3605742095d603f703c7adef39dc09aa6 (diff)
downloadcoreboot-30584912579d050c6bb3de3d55ca887e6ae094b5.tar.xz
My forgotten CAR cleanup patch...
- Drop lots of dead code from the various cache_as_ram.inc files. - Use some descriptive macros instead of magic numbers for MTRR MSRs - drop unused duplicate descriptors from romstage GDT - slightly reformatting code and comments Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5696 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_6ex')
-rw-r--r--src/cpu/intel/model_6ex/cache_as_ram.inc26
1 files changed, 0 insertions, 26 deletions
diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc
index 18482c9270..414ca0711a 100644
--- a/src/cpu/intel/model_6ex/cache_as_ram.inc
+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc
@@ -176,21 +176,6 @@ clear_mtrrs:
post_code(0x33)
-#undef CLEAR_FIRST_1M_RAM
-#ifdef CLEAR_FIRST_1M_RAM
- post_code(0x34)
- /* Enable Write Combining and Speculative Reads for the first 1MB */
- movl $MTRRphysBase_MSR(0), %ecx
- movl $(0x00000000 | MTRR_TYPE_WRCOMB), %eax
- xorl %edx, %edx
- wrmsr
- movl $MTRRphysMask_MSR(0), %ecx
- movl $(~(1024*1024 -1) | (1 << 11)), %eax
- movl $0x0000000f, %edx // 36bit address space
- wrmsr
- post_code(0x35)
-#endif
-
/* Enable Cache */
movl %cr0, %eax
andl $~( (1 << 30) | (1 << 29) ), %eax
@@ -198,17 +183,6 @@ clear_mtrrs:
post_code(0x36)
-#ifdef CLEAR_FIRST_1M_RAM
-
- /* Clear first 1MB of RAM */
- movl $0x00000000, %edi
- cld
- xorl %eax, %eax
- movl $((1024*1024) / 4), %ecx
- rep stosl
-
- post_code(0x37)
-#endif
/* Disable Cache */
movl %cr0, %eax