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| author | Stefan Reinauer <reinauer@chromium.org> | 2013-05-06 18:05:39 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-08 18:24:23 +0200 |
| commit | 648d16679c5cf4f91c9f8b48ee77c6a9ada87523 (patch) | |
| tree | f2985f2e7e1cdf4a51897ccb30d6b4f2da6272f0 /src/cpu/intel/model_6ex | |
| parent | 2a3c10677f354f660a759d47a3b26b1d8818e76c (diff) | |
| download | coreboot-648d16679c5cf4f91c9f8b48ee77c6a9ada87523.tar.xz | |
copy_and_run: drop boot_complete parameter
Since this parameter is not used anymore, drop it from
all calls to copy_and_run()
Change-Id: Ifba25aff4b448c1511e26313fe35007335aa7f7a
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3213
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel/model_6ex')
| -rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram.inc | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc index b8222e15a2..50fab35ccc 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram.inc +++ b/src/cpu/intel/model_6ex/cache_as_ram.inc @@ -225,17 +225,12 @@ clear_mtrrs: post_code(0x3c) - /* Clear boot_complete flag. */ - xorl %ebp, %ebp __main: post_code(POST_PREPARE_RAMSTAGE) cld /* Clear direction flag. */ - movl %ebp, %esi - movl $ROMSTAGE_STACK, %esp movl %esp, %ebp - pushl %esi call copy_and_run .Lhlt: |